Compute Express Link® (CXL®) is an industry-supported Cache-Coherent Interconnect for Processors, Memory Expansion and Accelerators. CXL technology maintains memory coherency between the CPU memory space and memory on attached devices, which allows resource sharing for higher performance, reduced software stack complexity, and lower overall system cost. This permits users to simply focus on target workloads as opposed to the redundant memory management hardware in their accelerators.
CXL is designed to be an industry open standard interface for high-speed communications, as accelerators are increasingly used to complement CPUs in support of emerging applications such as Artificial Intelligence and Machine Learning.
CXL 3.0 Specification is Available Now
The CXL 3.0 specification expands on previous technology generations to increase scalability and to optimize system level flows with advanced switching and fabric capabilities, efficient peer-to-peer communications, and fine-grained resource sharing across multiple compute domains.
Key Highlights of the CXL 3.0 Specification:
Fabric capabilities
Multi-headed and Fabric Attached Devices
Enhanced Fabric Management
Composable disaggregated infrastructure
Better scalability and improved resource utilization
Enhanced memory pooling
Multi-level switching
New enhanced coherency capabilities
Improved software capabilities
Doubles the bandwidth to 64GTs
Zero added latency over CXL 2.0
Full backward compatibility with CXL 2.0, CXL 1.1, and CXL 1.0
Download the CXL 3.0 white paper for more details.